As is known, broadcast TV uses a frequency spectrum of about 40 MHz to about 900 MHz, depending on the country and standard. In the usual case, the spectrum may be populated with both weak and strong channels, depending on a location of a given receiver with respect to a particular transmitter. In a typical case, a mixer of a receiver down-converts both a desired channel and an image channel. The image channel is situated on an opposite side of a local oscillator (LO) frequency at two times the intermediate frequency (IF) away from the desired channel. The image channel, when provided by a transmitter located near a receiver, may have a relatively high power, as compared to a power of a desired channel provided by a transmitter located at a greater distance from the receiver. Even when the down-conversion gain of the image channel is reduced through specific techniques (e.g., bandpass filtering around a desired channel), it can be difficult to achieve a desired attenuation of the image channel. As an image channel resides on top of a desired channel when down-converted, the image channel can significantly degrade the reception quality of a receiver.
A number of techniques have been utilized in receivers to address the image channel issue. For example, open-loop gain and phase correction (or calibration) has been used to address image channel issues for complex mixers of a receiver. However, when analog correction circuitry is implemented, the low accuracy of typical analog correction circuits tend to limit the image rejection performance of a receiver. Furthermore, an analog correction circuit typically requires calibration or recalibration to account for process, temperature, and/or supply voltage variations. In a quadrature mixer, finite image rejection may be attributable to phase and gain mismatch between two quadrature signals. Ideally, the quadrature signals should be at ninety degrees phase shift and have the same magnitude.
With reference to FIG. 1, a prior art complex receiver 100 is depicted that implements an analog in-phase/quadrature (I/Q) signal mismatch calibration circuit. As is illustrated, an input of a low noise amplifier (LNA) 110 receives a radio frequency (RE) input signal (RFIN) and an output of the LNA 110 is coupled to a first input of a mixer 102 and a first input of a mixer 104. The mixer 102 receives, at a second input, an in-phase local oscillator (LO(I)) signal from a quadrature voltage controlled oscillator (VCO) 112. Similarly, the mixer 104 receives, at a second input, a quadrature local oscillator (LO(Q)) signal from the VCO 112. An output of the mixer 102 is coupled to an input of a variable gain amplifier (VGA) 106 and an output of the mixer 104 is coupled in an input of a VGA 108. Gain adjustment inputs of the VGAs 106 and 108 are coupled to an output of an analog I/Q gain correction circuit 118. An output of an RF-phase locked loop (RF-PLL) 114 is coupled to a reference input of the VCO 112.
The RF-PLL 114 provides a reference signal at the reference input of the VCO 112. The VCO 112 implements two different oscillators (not separately shown) that are coupled together by a differential transistor pair 120 that includes a current source 112, coupled between sources of the differential transistor pair 120 and ground. An I/Q phase correction circuit 116 is coupled to the inputs of the differential pair 120. The I/Q phase correction circuit 116 modifies a phase between in-phase (I) and quadrature (Q) signals by changing a ratio between tail currents that flow through the differential transistor pair 120.
Thus, the receiver 100 may correct for a phase shift between I and Q signals by performing an analog phase matching adjustment. Similarly, the I/Q gain correction circuit 118 adjusts, in an analog manner; a gain value of the quadrature signal paths by applying an appropriate analog signal to the gain inputs of the VGAs 106 and 108. Unfortunately, this technique has a relatively low accuracy due to the analog correction circuitry implemented within the gain correction and phase correction circuits 118 and 116, and, as such, the image rejection performance of the receiver 100 is limited. Moreover, as previously mentioned, an analog correction circuit is subject to process, temperature, and/or supply voltage variations, which requires repeating the calibration process when conditions change. Furthermore, an analog implementation is not particularly well suited for modern highly integrated receivers that utilize digital signal processors (DSPs) and which usually implement digital control signals.
While digital control of gain and phase correction for complex RF receivers has been employed, implementing digital control has required converting intermediate frequency in-phase (IF(I)) and quadrature (IF(Q)) signals to a digital format. In the terrestrial TV case, converting the IF(I) and IF(Q) signals to a digital format has required analog-to-digital converters (ADCs) with relatively large dynamic ranges. Integrating an ADC with a relatively large dynamic range requirement in general purpose complementary metal-oxide semiconductor (CMOS) technology is generally difficult.
Turning to FIG. 2, a prior art complex receiver 200 is depicted that implements a digital I/Q correction technique, which requires the quadrature IF signals be converted into a digital format. An input of a low noise amplifier (LNA) 202 receives an RF input signal (RFIN) and an output of the LNA 202 is coupled to a first input of a mixer 204 and a first input of a mixer 206. An RF-PLL 210 provides a reference signal to a circuit 208, which provides an in-phase LO signal to a second input of the mixer 204 and a quadrature LO signal to a second input of the mixer 206. An output of the mixer 204 is coupled to an input of an anti-aliasing filter 212, whose output is coupled to an input of a variable gain amplifier (VGA) 216. An output of the VGA 216 is coupled to an input of an adaptive active filter (AAF) 220, which compensates for frequency dependent transmission path attenuation by boosting higher frequency components of a received signal. An output of the AAF 220 is coupled to an input of an analog-to-digital converter (ADC) 224, whose output is coupled to an input of an I/Q correction circuit 228, which performs I/Q correction on the in-phase (I) and quadrature (Q) signals.
Similarly, an output of the mixer 206 is coupled to an input of an anti-aliasing filter 214, whose output is coupled to an input of a VGA 218. An output of the VGA 218 is coupled to an input of the AAF 222, whose output is a coupled to an input of the ADC 226. An output of the ADC 226 is coupled to an input of the I/Q correction circuit 228, which, as previously noted, functions to correct a phase and gain difference between the I and Q signals. Outputs of the I/Q correction circuit 228 are coupled to inputs of a digital signal processor (DSP) 230, which performs digital mixing and channel selection. Thus, in order to perform I/Q correction the receiver 200 converts the quadrature IF signals to a digital format. While variations of the receiver 200 have been successfully implemented in communications systems, e.g., cellular telephony and satellite TV receivers, the relatively large ADC dynamic range requirement of the architecture is not particularly appropriate for general purpose CMOS integration.
What is needed is a technique for performing I/Q correction of a complex radio frequency receiver implemented in a terrestrial TV application that may be readily integrated within current CMOS processes.